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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-10-13 21:08:34 +0400
committerKeith Packard <keithp@keithp.com>2011-10-21 10:21:58 +0400
commita487928908226df493a3ce145ecf4bb39296714e (patch)
tree8b967adcac68bff3383dbefab246ce7541f4b265 /tools/perf/scripts/python/syscall-counts.py
parent4c9c18c29347a8bfce1dcd28271bf782aab16639 (diff)
downloadlinux-a487928908226df493a3ce145ecf4bb39296714e.tar.xz
drm/i915: remove transcoder PLL mashing from mode_set per specs
Belongs in PCH enable instead. The duplication is worrying and the specs explicitly list transcoder select *after* actual PLL enable, which doesn't occur until later. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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