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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-05-21 21:56:13 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-06-01 18:40:19 +0300 |
| commit | 0a59952b24e24e153b8d1cbd781c8d264257b1b3 (patch) | |
| tree | b5bc1c4fcec43611ff681981e465bd9873c458cc /tools/perf/scripts/python/syscall-counts.py | |
| parent | 012d79e6a33f095c293fe2a02b2b3b26d8c6402c (diff) | |
| download | linux-0a59952b24e24e153b8d1cbd781c8d264257b1b3.tar.xz | |
drm/i915: Configure SKL+ scaler initial phase correctly
Set up the SKL+ scaler initial phase registers correctly. Otherwise
we start fetching the data from the center of the first pixel instead
of the top-left corner, which obviously then leads to right/bottom edges
replicating data excessively as the data runs out half a pixel too soon.
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180521185613.5097-2-ville.syrjala@linux.intel.com
Reviewed-By: Vidya Srinivas <vidya.srinivas@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions