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author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-12-06 14:23:26 +0300 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-01-09 19:16:48 +0300 |
commit | b68188a70ee9e532f637f6107657c90be055cf69 (patch) | |
tree | a0ec9ce63beaaad31be5f4f4ae0ccf0fc9c3fd24 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
parent | a89897e5f345d9cacda4edfdc2952063237fd68d (diff) | |
download | linux-b68188a70ee9e532f637f6107657c90be055cf69.tar.xz |
arm64: dts: mt8195: Add complete CPU caches information
This SoC features two clusters composed of:
- 4x Cortex A55: 32KB I-cache and 32KB D-cache, 4-way set associative,
per-cpu 128KB L2 cache, 4-way set associative;
- 4x Cortex A78: 64KB I-cache and 64KB D-cache, 4-way set associative,
per-cpu 256KB L2 cache, 8-way set associative;
Moreover, the two clusters are sharing a DSU L3 cache with size 2MB,
16-way set associative.
With that in mind, add the appropriate properties needed to specify the
caches information for this SoC, which will now be correctly exported
to sysfs.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221206112330.78431-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions