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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2022-12-06 14:23:29 +0300
committerMatthias Brugger <matthias.bgg@gmail.com>2023-01-09 19:16:49 +0300
commit34a39d4764849cec7272ffe1ccbba66edae8ea38 (patch)
tree95d1fb69cbcc312c827e2e07f92a552125d506b3 /tools/perf/scripts/python/syscall-counts-by-pid.py
parent70282f31f7e6b112014a1bf001affeb326e19e58 (diff)
downloadlinux-34a39d4764849cec7272ffe1ccbba66edae8ea38.tar.xz
arm64: dts: mt8183: Add complete CPU caches information
This SoC features two clusters composed of: - 4x Cortex A53: 32KB I-cache, 2-way set associative, 32KB D-cache, 4-way set associative, unified 1MB L2 cache, 16-way set associative; - 4x Cortex A73: 64KB I-cache and 64KB D-cache, 4-way set associative, unified 1MB L2 cache, 16-way set associative; With that in mind, add the appropriate properties needed to specify the caches information for this SoC, which will now be correctly exported to sysfs. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221206112330.78431-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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