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author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2017-03-07 08:28:57 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2017-03-07 09:48:23 +0300 |
commit | c4a59df9de199426b773a15e0c774ae25f628d5d (patch) | |
tree | 6f4d1fb2627f07550ec94288e92964898fc7d4ef /tools/perf/scripts/python/stackcollapse.py | |
parent | 65d0b7ed40f8a3a41a0ac5ed5ca4d1874c6aaf2d (diff) | |
download | linux-c4a59df9de199426b773a15e0c774ae25f628d5d.tar.xz |
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on data path).
First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.
=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection
Playback case
[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
rx ~~~~~~~~~~~~
Capture
[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
tx ~~~~~~~~~~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions