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authorConor Dooley <conor.dooley@microchip.com>2022-11-10 00:22:17 +0300
committerArnd Bergmann <arnd@arndb.de>2022-11-15 18:48:02 +0300
commitbe7d172b0f911e356a1cba5ea96f8e5a116bb7cb (patch)
tree7f4a29dc142a45f4977e358e9044ffe1bcd7c83c /tools/perf/scripts/python/stackcollapse.py
parente82b5b63c6520067699c5d178e4ed09eb38f065d (diff)
downloadlinux-be7d172b0f911e356a1cba5ea96f8e5a116bb7cb.tar.xz
MAINTAINERS: add entries for misc. RISC-V SoC drivers and devicetrees
Following some discussion both on & off list, I have volunteered to take over maintaining the miscellaneous RISC-V devicetrees & soc drivers from Palmer to ease his load. So far only SiFive and Microchip have stuff in drivers/soc. For the former, a SiFive entry exists with a dead GitHub repo - so remove that to avoid confusion since the patches for drivers/soc & devicetrees will be routed via my tree & other drivers go through their subsystem trees. The Microchip directory only contains a RISC-V driver for now, but is likely to contain drivers for other archs in the future. To that end, change the PolarFire SoC entry to specifically mention the RISC-V driver & the new directory level entry does not mention an architecture. CC: Arnd Bergmann <arnd@arndb.de> CC: Nicolas Ferre <nicolas.ferre@microchip.com> CC: Palmer Dabbelt <palmer@dabbelt.com> Link: https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/ Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20221109212219.1598355-2-conor@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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