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| author | Yifan Zha <Yifan.Zha@amd.com> | 2022-09-07 09:13:02 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-19 05:13:24 +0300 |
| commit | 97a3d6090f5c2a165dc88bda05c1dcf9f08bf886 (patch) | |
| tree | c2cbf6f3dd80c28263d8faa8fdfddb9c094ff8cf /tools/perf/scripts/python/stackcollapse.py | |
| parent | e688ba3e276422aa88eae7a54186a95320836081 (diff) | |
| download | linux-97a3d6090f5c2a165dc88bda05c1dcf9f08bf886.tar.xz | |
drm/amdgpu: Program GC registers through RLCG interface in gfx_v11/gmc_v11
[Why]
L1 blocks most of GC registers accessing by MMIO.
[How]
Use RLCG interface to program GC registers under SRIOV VF in full access time.
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions