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| author | Sibi Sankar <sibis@codeaurora.org> | 2020-11-24 09:21:15 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-11-25 02:04:30 +0300 |
| commit | 8fd01e01fd6f8ba67e4ed8c5be0ab76d06156287 (patch) | |
| tree | 1d8cc1b996e9d68ec78d022064fa907d31d890b1 /tools/perf/scripts/python/stackcollapse.py | |
| parent | d4b85bc550f49e46cf1d945a342d316c814e94c5 (diff) | |
| download | linux-8fd01e01fd6f8ba67e4ed8c5be0ab76d06156287.tar.xz | |
arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC
since the gold cores only support frequencies upto 2.1 GHz.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-1-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions