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authorLike Xu <likexu@tencent.com>2022-08-31 11:53:27 +0300
committerSean Christopherson <seanjc@google.com>2022-09-28 22:47:22 +0300
commit5c6a67f4f265f84e1b8582f82562dda2a53f52d1 (patch)
tree8ecd65ff3bf918cc76550c03394f5faf2c67ef99 /tools/perf/scripts/python/stackcollapse.py
parentcf52de619c67bd1f6b1cf2751c3827815f74a5a5 (diff)
downloadlinux-5c6a67f4f265f84e1b8582f82562dda2a53f52d1.tar.xz
KVM: x86/svm/pmu: Direct access pmu->gp_counter[] to implement amd_*_to_pmc()
Access PMU counters on AMD by directly indexing the array of general purpose counters instead of translating the PMC index to an MSR index. AMD only supports gp counters, there's no need to translate a PMC index to an MSR index and back to a PMC index. Opportunistically apply array_index_nospec() to reduce the attack surface for speculative execution and remove the dead code. Signed-off-by: Like Xu <likexu@tencent.com> Link: https://lore.kernel.org/r/20220831085328.45489-7-likexu@tencent.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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