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| author | Thippeswamy Havalige <thippeswamy.havalige@amd.com> | 2022-11-11 08:37:08 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2022-11-11 21:34:02 +0300 |
| commit | 560e9ce100c4bcbab0d5f9f18f01006f2abffef8 (patch) | |
| tree | 669dfcb7526e65ba6185d1415b0349730dfad2e5 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ea3723a541c198c84e81a0e975dba6c18764393e (diff) | |
| download | linux-560e9ce100c4bcbab0d5f9f18f01006f2abffef8.tar.xz | |
dt-bindings: PCI: xilinx-pcie: Convert to YAML schemas of Xilinx AXI PCIe Root Port Bridge
Convert to YAML dtschemas of Xilinx AXI PCIe Root Port Bridge
dt binding.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221111053709.1474323-1-thippeswamy.havalige@amd.com
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions