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| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 11:46:39 +0300 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2023-01-31 15:45:17 +0300 |
| commit | 4e197ee880c24ecb63f7fe17449b3653bc64b03c (patch) | |
| tree | 179750b44e50906eb3499561e643d5f6da952f59 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 5f82bfced6118450cb9ea3f12316568f6fac10ab (diff) | |
| download | linux-4e197ee880c24ecb63f7fe17449b3653bc64b03c.tar.xz | |
clk: imx6ul: add ethernet refclock mux support
Add ethernet refclock mux support and set it to internal clock by
default. This configuration will not affect existing boards.
clock tree before this patch:
fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-,
|- pll6_enet
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-ยด
after this patch:
fec1 <- enet1_ref_sel(mux) <- enet1_ref_125m (gate) <- ...
`--<> enet1_ref_pad |- pll6_enet
fec2 <- enet2_ref_sel(mux) <- enet2_ref_125m (gate) <- ...
`--<> enet2_ref_pad
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-17-o.rempel@pengutronix.de
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions