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| author | Trigger Huang <Trigger.Huang@amd.com> | 2019-04-24 10:23:41 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-05-24 20:20:50 +0300 |
| commit | 2d11fd3f5420f71b15158672a8ffa3722b37ebf5 (patch) | |
| tree | 8f0bf5158a5194aa85461fd7697f90168b5ca7fc /tools/perf/scripts/python/stackcollapse.py | |
| parent | 78d481126795e9e4740204df95572d9731a6d34e (diff) | |
| download | linux-2d11fd3f5420f71b15158672a8ffa3722b37ebf5.tar.xz | |
drm/amdgpu: initialize PSP before IH under SR-IOV
In order to support new PSP feature that PSP may provide interface
to program IH CNTL register, initialize PSP before IH under Vega10
SR-IOV VF
Signed-off-by: Trigger Huang <Trigger.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions