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| author | Andrew Jones <ajones@ventanamicro.com> | 2023-01-28 20:28:51 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-02-01 10:29:40 +0300 |
| commit | 1bc400ffb52b460eedc51ebd9b7753b7f2314878 (patch) | |
| tree | 4fad74b3c3a2bf08fb38200b5b6f1fab34f97b7f /tools/perf/scripts/python/stackcollapse.py | |
| parent | e0c267e03b0c77c9ac79ac08eada41ba8eb1b95f (diff) | |
| download | linux-1bc400ffb52b460eedc51ebd9b7753b7f2314878.tar.xz | |
riscv: module: Add ADD16 and SUB16 rela types
To prepare for 16-bit relocation types to be emitted in alternatives
add support for ADD16 and SUB16.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230128172856.3814-9-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions