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| author | John Harrison <John.C.Harrison@Intel.com> | 2023-01-25 02:11:11 +0300 |
|---|---|---|
| committer | Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> | 2023-02-01 02:17:30 +0300 |
| commit | 003e11ed2ef4af01b808f0f193eaa5a32f32383b (patch) | |
| tree | 77567d36d7662d5803750da7d3b1a452892c5693 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 2f8c06cb6622b55ebd0092abaa49630b411cb720 (diff) | |
| download | linux-003e11ed2ef4af01b808f0f193eaa5a32f32383b.tar.xz | |
drm/i915/mtl: Wa_22011802037: don't complain about missing regs on MTL
Wa_22011802037 requires waiting for an engine-specific register to
clear. A missing entry for GSC engine in the register table is flagged
as a drm_err. The drm_err was originally intended to catch missing
register entries for newer engines, however, it was later found that the
WA is only required for 'legacy' engines. So just drop the drm_err.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230124231111.1786429-1-umesh.nerlige.ramappa@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions