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author | Mahesh Kumar <mahesh1.kumar@intel.com> | 2018-08-31 14:09:42 +0300 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-09-14 00:33:03 +0300 |
commit | 86b592876cb6b277e5cb3c988fc5f748fdafa16f (patch) | |
tree | 1633b48c56fccc931a48d75a019c846c252ca2be /tools/perf/scripts/python/sched-migration.py | |
parent | 5771caf885ae779ade0ea009ae5d5f363bb72a52 (diff) | |
download | linux-86b592876cb6b277e5cb3c988fc5f748fdafa16f.tar.xz |
drm/i915: Implement 16GB dimm wa for latency level-0
Memory with 16GB dimms require an increase of 1us in level-0 latency.
This patch implements the same.
Bspec: 4381
changes since V1:
- s/memdev_info/dram_info
- make skl_is_16gb_dimm pure function
Changes since V2:
- make is_16gb_dimm more generic
- rebase
Changes since V3:
- Simplify condition (Maarten)
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180831110942.9234-1-mahesh1.kumar@intel.com
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions