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| author | Witold Sadowski <wsadowski@marvell.com> | 2024-07-24 18:47:34 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-07-29 03:19:27 +0300 |
| commit | 75128e2a14a9f443e8debdd30445f5934b5a7c83 (patch) | |
| tree | 28fe9ca0ee1dc86b0fb0a5690e7465fdd3e7b6f8 /tools/perf/scripts/python/parallel-perf.py | |
| parent | 26d34fdc49712ddbd42b11102f5d9d78a0f42097 (diff) | |
| download | linux-75128e2a14a9f443e8debdd30445f5934b5a7c83.tar.xz | |
spi: cadence: Add Marvell SDMA operations
In Marvell xSPI implementation any access to SDMA register will result
in 8 byte SPI data transfer. Reading less data(eg. 1B) will result in
losing remaining bytes. To avoid that read/write 8 bytes into temporary
buffer, and read/write whole temporary buffer into SDMA.
Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
Link: https://patch.msgid.link/20240724154739.582367-5-wsadowski@marvell.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions