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| author | Lang Cheng <chenglang@huawei.com> | 2021-06-21 11:00:37 +0300 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-06-21 21:03:41 +0300 |
| commit | a762fe656b1d59a3d597c0556aa6c029c569364a (patch) | |
| tree | d3407239b44dd9f85d31a78f6b6ad75fd8e8cf81 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | fe331da0f210c60342b042a03fe53f1b564b412b (diff) | |
| download | linux-a762fe656b1d59a3d597c0556aa6c029c569364a.tar.xz | |
RDMA/hns: Add hr_reg_write_bool()
In order to avoid to do bitwise operations on a boolean value, add a new
register interface to avoid sparse comlaint about "dubious: x & !y" when
calling hr_reg_write(ctx, field, !!val).
Fixes: dc504774408b ("RDMA/hns: Use new interface to set MPT related fields")
Fixes: 495c24808ce7 ("RDMA/hns: Add XRC subtype in QPC and XRC type in SRQC")
Link: https://lore.kernel.org/r/1624262443-24528-4-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions