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| author | Felix Fietkau <nbd@nbd.name> | 2019-07-16 19:12:07 +0300 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2019-09-05 18:42:30 +0300 |
| commit | 880495e2f00b68633aaa264d7633c419e0c7b2d1 (patch) | |
| tree | 913930600bf866cb915e9d45fcec860b047f32de /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 27c7bfc5f0633a5a98f35ff418de7945699dd497 (diff) | |
| download | linux-880495e2f00b68633aaa264d7633c419e0c7b2d1.tar.xz | |
mt76: mt7615: add missing register initialization
- initialize CCA signal source
- initialize clock for band 1 (7615D)
- initialize BAR rate
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions