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| author | Jagan Teki <jagan@amarulasolutions.com> | 2021-02-28 18:43:20 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-03-11 14:06:23 +0300 |
| commit | 30f9a9da4ee13c0aa2469ffaf98466f265b1a6e2 (patch) | |
| tree | 47e9806a2a59f6c1efab033eaa8b468e6f87bcc1 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 111d2346d4b2b172bfa69ea7860d13fbcd4d1cd3 (diff) | |
| download | linux-30f9a9da4ee13c0aa2469ffaf98466f265b1a6e2.tar.xz | |
ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features
i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
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