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authorHector Palacios <hector.palacios@digi.com>2023-03-10 11:06:09 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2023-03-22 19:05:51 +0300
commite8c047b4a92cf4af7a81bf31e9b31fedc7434335 (patch)
tree41db1400c5b46d9916607f136705071c88b0a24e /tools/perf/scripts/python/exported-sql-viewer.py
parent4080d536241652af43996d9ceee2b79aeca57267 (diff)
downloadlinux-e8c047b4a92cf4af7a81bf31e9b31fedc7434335.tar.xz
mtd: rawnand: hynix: fix up bit 0 of sdr_timing_mode
According to the ONFI specification, bit 0 of 'SDR timing mode support' (bytes 129-130) "shall be 1". That means the NAND supports at least timing mode 0. NAND chip Hynix H27U4G8F2GDA-BI (at least) is reading a 0 on this field which makes nand_choose_best_sdr_timings() return with error and the probe function to eventually fail. Given that sdr_timing_modes bit 0 must be 1 by specification, force it in case the NAND reports it is not set. This is a safe assumption because the mode 0 is the minimum (safer) set of timings that the NAND can work with. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230223165104.525852-1-hector.palacios@digi.com Link: https://lore.kernel.org/linux-mtd/20230310080609.1930869-1-hector.palacios@digi.com
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