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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-03-14 16:02:49 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-03-17 16:05:14 +0300
commit6e889b1ce7f1be2bfcfe39a4bcc82b34380031c4 (patch)
treedb5e3eda76806a6ab2e7d992732febf3017b6544 /tools/perf/scripts/python/exported-sql-viewer.py
parentc640f6c5570a6af904db37979d344ace8312c675 (diff)
downloadlinux-6e889b1ce7f1be2bfcfe39a4bcc82b34380031c4.tar.xz
drm/i915: Define more pipe timestamp registers
Add definitions for various pipe timestamp registers: - frame timestamp (last start of vblank) (g4x+), already had this defined - flip timestamp (when SURF was last written) (g4x+) - flipdone timestamp (when last flipdone was signalled) (tgl+) Note that on pre-tgl the flip related timestamps are only updated for primary plane flips, but on tgl+ we can select which plane updates them (via PIPE_MISC2). Let's define those related bits as well. Curiously VLV/CHV do not have the frame/flip timestamp registers, despite all the other related registers being inherited from g4x. This means we can get rid of the pipe_offsets[] usage for these, and thus the implicit dev_priv is gone as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230314130255.23273-4-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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