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authorPalmer Dabbelt <palmer@rivosinc.com>2022-12-09 02:57:11 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2022-12-09 03:05:08 +0300
commit558480d3e7d9a21b18354afdc308cd867efbba49 (patch)
tree71e8f373e306c3b0e6e1e338047350b338418ad3 /tools/perf/scripts/python/exported-sql-viewer.py
parent049696a39d2fbaad1b35b08cbc65d9e17c0406bc (diff)
parentbf3d7b1d8499ca46874c7373d2043ecbe252cccc (diff)
downloadlinux-558480d3e7d9a21b18354afdc308cd867efbba49.tar.xz
Merge patch series "RISC-V interrupt controller select cleanup"
Conor Dooley <conor@kernel.org> says: From: Conor Dooley <conor.dooley@microchip.com> Submitted a patch yesterday defaulting the SiFive PLIC driver to enabled [0], and in the ensuing conversation Marc suggested just doing a select at the arch level and dropping the user selectability completely. * b4-shazam-merge: RISC-V: stop selecting SIFIVE_PLIC at the SoC level irqchip/riscv-intc: remove user selectability of RISCV_INTC irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC Link: https://lore.kernel.org/r/20221118104300.85016-1-conor@kernel.org Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/all/87zgceszp8.wl-maz@kernel.org/ Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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