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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-14 01:56:44 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2022-07-15 11:41:02 +0300 |
| commit | 1e98a35da49ee7d5b0d101518da51a109a02f238 (patch) | |
| tree | f8060c57a1c8a41bf5808382a515bce049bb5657 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 60b51e3e333b9986721d77a465c41577c226eb3b (diff) | |
| download | linux-1e98a35da49ee7d5b0d101518da51a109a02f238.tar.xz | |
iommu/amd: Introduce Support for Extended Feature 2 Register
AMD IOMMU spec introduces additional extended feature register
in the IVRS IVHD offset 80h (for IVHD type 11h and 40h) and MMIO
offset 1A0h.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20220713225651.20758-3-suravee.suthikulpanit@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions