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| author | Sunil Khatri <sunil.khatri@amd.com> | 2024-05-21 16:43:44 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-23 22:13:34 +0300 |
| commit | eb14b8f50516b543b3483a14b1f30001940e6305 (patch) | |
| tree | 70b038ef0904e4bf0db62819944304fd6404d615 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 836bc350a59bf151e99919ba10bca95dc2b1bd70 (diff) | |
| download | linux-eb14b8f50516b543b3483a14b1f30001940e6305.tar.xz | |
drm/amdgpu: Add missing offsets in gc_11_0_0_offset.h
IB1 registers:
regCP_IB1_CMD_BUFSZ
regCP_IB1_BASE_LO
regCP_IB1_BASE_HI
regCP_IB1_BUFSZ
regCP_MES_DEBUG_INTERRUPT_INSTR_PNTR
Above registers are part of the asic but not of
the offset file for gc_11_0_0_offset.h and hence
adding them.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions