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| author | Esben Haabendal <esben@geanix.com> | 2021-06-17 12:49:26 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-06-17 21:39:48 +0300 |
| commit | 8da32a1071af4af7723269ad4e84cc6160e2dc41 (patch) | |
| tree | 547424307b29d614ad5cf737a1c7bf9cfad28f3f /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | e2dbbbe52c4a0f7704735b49f864fe8ea06111e5 (diff) | |
| download | linux-8da32a1071af4af7723269ad4e84cc6160e2dc41.tar.xz | |
net: gianfar: Add definitions for CAR1 and CAM1 register bits
These are for carry status and interrupt mask bits of statistics registers.
Signed-off-by: Esben Haabendal <esben@geanix.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions