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| author | Alvin Lee <alvin.lee2@amd.com> | 2023-11-09 01:16:28 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-30 00:48:59 +0300 |
| commit | 75a3371e8ffdab2e504f4326daab60f8fb15fdf1 (patch) | |
| tree | 88af81920d65dde0f148eaa2c2a1284cf960a34f /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 220db802cb505e6ec3b3e0018ac0233205632a72 (diff) | |
| download | linux-75a3371e8ffdab2e504f4326daab60f8fb15fdf1.tar.xz | |
drm/amd/display: Increase num voltage states to 40
[Description]
If during driver init stage there are greater than 20
intermediary voltage states while constructing the SOC
BB we could hit issues because we will index outside of the
clock_limits array and start overwriting data. Increase the
total number of states to 40 to avoid this issue.
Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions