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| author | Caleb Connolly <caleb.connolly@linaro.org> | 2023-06-30 00:00:53 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-07-14 08:44:27 +0300 |
| commit | 2bc06b7604d214807918dea810b56e0840aa7ba3 (patch) | |
| tree | b5db193856802de3ad77ba55cfd4eff6dfe8038e /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | e4322bb818bbcd36b441de9880fa4ac911a5eb51 (diff) | |
| download | linux-2bc06b7604d214807918dea810b56e0840aa7ba3.tar.xz | |
arm64: dts: qcom: c630: add panel bridge 1p2 regulator
The VCC and VCCA supplies of the DSI<->eDP bridge are derived from
vreg_l2a_1p2 and controlled by a GPIO on the PMIC. Add the regulator
here so Linux can control it.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230627-c630-uart-and-1p2-reg-v2-1-496b581935c1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions