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authorMoudy Ho <moudy.ho@mediatek.com>2023-01-18 06:15:07 +0300
committerMatthias Brugger <matthias.bgg@gmail.com>2023-01-30 14:27:02 +0300
commit1873da264caedf6b84417ff8cb0f843659f75dac (patch)
tree94959ec2b5ef1aaecfbecc1d73f0eeab16b08675 /tools/perf/scripts/python/export-to-sqlite.py
parentc200774a6df47cfc1053334c98ab777563de5bd8 (diff)
downloadlinux-1873da264caedf6b84417ff8cb0f843659f75dac.tar.xz
dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be determined by compatible names. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230118031509.29834-3-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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