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| author | Andre Przywara <andre.przywara@arm.com> | 2020-02-28 16:51:03 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-03-26 12:52:19 +0300 |
| commit | 0f1321172e0cab2c8ce85656ab6f531feb540715 (patch) | |
| tree | 99e749098896ea56d87671d6b40f0489c17fd634 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 28c05e422305c17ce3db7290d997b2a4f1ebee64 (diff) | |
| download | linux-0f1321172e0cab2c8ce85656ab6f531feb540715.tar.xz | |
arm: dts: calxeda: Provide UART clock
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.
Link: https://lore.kernel.org/r/20200228135106.220620-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions