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authorGeorge Shen <george.shen@amd.com>2021-04-17 00:35:07 +0300
committerAlex Deucher <alexander.deucher@amd.com>2021-05-11 01:06:44 +0300
commit05e62b6b6433e1159018eb5862e906a3db24dfcd (patch)
treec35d2f0b07d1c4523c9b458113281d00785f7379 /tools/perf/scripts/python/export-to-sqlite.py
parent70c14a1d7ee4d25d2024967979c8ba618849af54 (diff)
downloadlinux-05e62b6b6433e1159018eb5862e906a3db24dfcd.tar.xz
drm/amd/display: Filter out YCbCr420 timing if VSC SDP not supported
[Why] Per DP specification, YCbCr420 shall use VSC SDP. [How] For YCbCr420 timings, fail DP mode timing validation if DPCD caps do not indicate VSC SDP colorimetry support. Signed-off-by: George Shen <george.shen@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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