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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-05-02 15:32:18 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2019-06-06 11:37:06 +0300 |
| commit | 02af9f90941b6cce5fb672ee058c142adcc11a2f (patch) | |
| tree | 48d0ad310e98c1bccdbdf0d9e6028fa8ad7f4301 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 51a0daf64dee78dacaecc7bec3d36e0b2f49c7a1 (diff) | |
| download | linux-02af9f90941b6cce5fb672ee058c142adcc11a2f.tar.xz | |
soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
Auto-enable support for the RZ/A1 Interrupt Controller when configuring
a kernel which supports RZ/A1H or RZ/A2M SoCs.
Keep selects sorted while at it.
This is similar to how interrupt controllers for other Renesas SoCs are
enabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions