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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-03-06 17:05:01 +0300
committerStephen Boyd <sboyd@kernel.org>2023-03-13 21:50:14 +0300
commit905b7430d3ccc435aec6030a622e5611704cc37c (patch)
treed2d9245d86d72cbec103e3d1d503628d8688b12d /tools/perf/scripts/python/export-to-postgresql.py
parentab44c1a70e79d37b243ba1a202d9596a7a137b9b (diff)
downloadlinux-905b7430d3ccc435aec6030a622e5611704cc37c.tar.xz
clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks
On this SoC some clocks apparently don't have different offsets for set/clr/sta registers hence they can be set, cleared and status-read on one register: this means that it was possible to use simpler gate clocks instead of custom mtk_gate ones. In preparation for converting this clock driver to the common probe mechanism for MediaTek clocks, perform a conversion from simple_gate to mtk_gate clocks since the latter does provide implicit support for simple gate clocks as well. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230306140543.1813621-13-angelogioacchino.delregno@collabora.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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