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author | Alvin Lee <alvin.lee2@amd.com> | 2023-12-01 16:25:07 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-12-06 23:22:33 +0300 |
commit | 823423b8ec7b56e22dad83e171c9ca6418679169 (patch) | |
tree | 0df9e750cc664ce9c919696b69c63552403fb67a /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 94bbf802efd0a8f13147d6664af6e653637340a8 (diff) | |
download | linux-823423b8ec7b56e22dad83e171c9ca6418679169.tar.xz |
drm/amd/display: Use channel_width = 2 for vram table 3.0
VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
info 3.0. This is because channel_width in the vram table no longer
represents the memory width
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions