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| author | Josip Pavic <Josip.Pavic@amd.com> | 2025-01-07 19:00:11 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-02-13 05:02:57 +0300 |
| commit | 06b0a4ad7162b9dd7e52dbec320ea9d080d9e551 (patch) | |
| tree | 103116adfff6539939a3a886eea8003e566fbc73 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 6eb4c13a38457c7ff41bbfa7638f34cfda29c662 (diff) | |
| download | linux-06b0a4ad7162b9dd7e52dbec320ea9d080d9e551.tar.xz | |
drm/amd/display: log destination of vertical interrupt
[Why]
Knowing the destination of OTG's vertical interrupt 2 is useful for
debugging, but it is not currently included in the OTG state readback
logic
[How]
Read the OTG interrupt destination register to get the vertical interrupt
2 destination on ASICs that have this register when reading back the OTG
state from hardware
Reviewed-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions