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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-04-04 09:14:59 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-04-08 05:46:15 +0300 |
| commit | 8e672b560e0b52ab9497fa48f361d5c174937a3e (patch) | |
| tree | f524c471d945556f12a329a7a9e5d6e0eab6ba1d /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 4e003d61e79504532babfb1d4e6b0767b32739d1 (diff) | |
| download | linux-8e672b560e0b52ab9497fa48f361d5c174937a3e.tar.xz | |
net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J784S4 CPSW9G
TI's J784S4 SoC supports USXGMII mode. Add USXGMII mode to the
extra_modes member of the J784S4 SoC data.
Configure MAC control register for supporting USXGMII mode and add
MAC_5000FD in the "mac_capabilities" member of struct "phylink_config".
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions