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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 21:08:17 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 21:08:17 +0300
commitbafb0762cb6a906eb4105cccfb3bcd90be7f40d2 (patch)
tree14ecb87c33bcf909e5b95c27cd694ded4ac1478c /tools/perf/arch
parent44b1671fae88ce95b8c7b53acbc6ba71ca67db00 (diff)
parent3a6430ce462172caac7c73f4afd550ab0f105737 (diff)
downloadlinux-bafb0762cb6a906eb4105cccfb3bcd90be7f40d2.tar.xz
Merge tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver update for 4.14-rc1. Lots of different stuff in here, it's been an active development cycle for some reason. Highlights are: - updated binder driver, this brings binder up to date with what shipped in the Android O release, plus some more changes that happened since then that are in the Android development trees. - coresight updates and fixes - mux driver file renames to be a bit "nicer" - intel_th driver updates - normal set of hyper-v updates and changes - small fpga subsystem and driver updates - lots of const code changes all over the driver trees - extcon driver updates - fmc driver subsystem upadates - w1 subsystem minor reworks and new features and drivers added - spmi driver updates Plus a smattering of other minor driver updates and fixes. All of these have been in linux-next with no reported issues for a while" * tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (244 commits) ANDROID: binder: don't queue async transactions to thread. ANDROID: binder: don't enqueue death notifications to thread todo. ANDROID: binder: Don't BUG_ON(!spin_is_locked()). ANDROID: binder: Add BINDER_GET_NODE_DEBUG_INFO ioctl ANDROID: binder: push new transactions to waiting threads. ANDROID: binder: remove proc waitqueue android: binder: Add page usage in binder stats android: binder: fixup crash introduced by moving buffer hdr drivers: w1: add hwmon temp support for w1_therm drivers: w1: refactor w1_slave_show to make the temp reading functionality separate drivers: w1: add hwmon support structures eeprom: idt_89hpesx: Support both ACPI and OF probing mcb: Fix an error handling path in 'chameleon_parse_cells()' MCB: add support for SC31 to mcb-lpc mux: make device_type const char: virtio: constify attribute_group structures. Documentation/ABI: document the nvmem sysfs files lkdtm: fix spelling mistake: "incremeted" -> "incremented" perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file nvmem: include linux/err.h from header ...
Diffstat (limited to 'tools/perf/arch')
-rw-r--r--tools/perf/arch/arm/util/cs-etm.c28
1 files changed, 27 insertions, 1 deletions
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index 7ce3d1a25133..fbfc055d3f4d 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -266,6 +266,32 @@ static u64 cs_etm_get_config(struct auxtrace_record *itr)
return config;
}
+#ifndef BIT
+#define BIT(N) (1UL << (N))
+#endif
+
+static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
+{
+ u64 config = 0;
+ u64 config_opts = 0;
+
+ /*
+ * The perf event variable config bits represent both
+ * the command line options and register programming
+ * bits in ETMv3/PTM. For ETMv4 we must remap options
+ * to real bits
+ */
+ config_opts = cs_etm_get_config(itr);
+ if (config_opts & BIT(ETM_OPT_CYCACC))
+ config |= BIT(ETM4_CFG_BIT_CYCACC);
+ if (config_opts & BIT(ETM_OPT_TS))
+ config |= BIT(ETM4_CFG_BIT_TS);
+ if (config_opts & BIT(ETM_OPT_RETSTK))
+ config |= BIT(ETM4_CFG_BIT_RETSTK);
+
+ return config;
+}
+
static size_t
cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
struct perf_evlist *evlist __maybe_unused)
@@ -363,7 +389,7 @@ static void cs_etm_get_metadata(int cpu, u32 *offset,
magic = __perf_cs_etmv4_magic;
/* Get trace configuration register */
info->priv[*offset + CS_ETMV4_TRCCONFIGR] =
- cs_etm_get_config(itr);
+ cs_etmv4_get_config(itr);
/* Get traceID from the framework */
info->priv[*offset + CS_ETMV4_TRCTRACEIDR] =
coresight_get_trace_id(cpu);