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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-06-28 21:22:40 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-06-28 21:22:40 +0300 |
| commit | 2594b713c12faa8976f97d8d16b3d8b343ff4ea2 (patch) | |
| tree | ad8c09a00b0d274696934e258c17f31ba620a692 /tools/lib/api/fs/tracing_path.c | |
| parent | f565b20734d32bab5a899123d2c58909dbf46a5d (diff) | |
| parent | 293649307ef9abcd4f83f6dac4d4400dfd97c936 (diff) | |
| download | linux-2594b713c12faa8976f97d8d16b3d8b343ff4ea2.tar.xz | |
Merge tag 'x86_cpu_for_v5.14_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cpu updates from Borislav Petkov:
- New AMD models support
- Allow MONITOR/MWAIT to be used for C1 state entry on Hygon too
- Use the special RAPL CPUID bit to detect the functionality on AMD and
Hygon instead of doing family matching.
- Add support for new Intel microcode deprecating TSX on some models
and do not enable kernel workarounds for those CPUs when TSX
transactions always abort, as a result of that microcode update.
* tag 'x86_cpu_for_v5.14_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/tsx: Clear CPUID bits when TSX always force aborts
x86/events/intel: Do not deploy TSX force abort workaround when TSX is deprecated
x86/msr: Define new bits in TSX_FORCE_ABORT MSR
perf/x86/rapl: Use CPUID bit on AMD and Hygon parts
x86/cstate: Allow ACPI C1 FFH MWAIT use on Hygon systems
x86/amd_nb: Add AMD family 19h model 50h PCI ids
x86/cpu: Fix core name for Sapphire Rapids
Diffstat (limited to 'tools/lib/api/fs/tracing_path.c')
0 files changed, 0 insertions, 0 deletions