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| author | Mark Brown <broonie@kernel.org> | 2015-10-26 05:15:54 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-10-26 05:15:54 +0300 |
| commit | 7c9c29eefa8ba503a34bac4ca4fb27083b78b726 (patch) | |
| tree | eb3bb499ebd185341f2b8266757c572fe42766cc /sound/soc/codecs/rt5645.h | |
| parent | 32b88194f71d6ae7768a29f87fbba454728273ee (diff) | |
| parent | 4922e7a1b767fcf6f29ce121ad74e424f4045eff (diff) | |
| download | linux-7c9c29eefa8ba503a34bac4ca4fb27083b78b726.tar.xz | |
Merge tag 'asoc-v4.3-rc2' into asoc-next
ASoC: Updates for v4.4
A first batch of updates targetted at v4.4. There are no substantial
core fixes here, the biggest block of changes is updates to the rcar
drivers and the addition of a CODEC driver for the AK4613.
# gpg: Signature made Fri 25 Sep 2015 05:37:06 KST using RSA key ID 5D5487D0
# gpg: key CD7BEEBC: no public key for trusted key - skipped
# gpg: key CD7BEEBC marked as ultimately trusted
# gpg: key AF88CD16: no public key for trusted key - skipped
# gpg: key AF88CD16 marked as ultimately trusted
# gpg: key 16005C11: no public key for trusted key - skipped
# gpg: key 16005C11 marked as ultimately trusted
# gpg: key 5621E907: no public key for trusted key - skipped
# gpg: key 5621E907 marked as ultimately trusted
# gpg: key 5C6153AD: no public key for trusted key - skipped
# gpg: key 5C6153AD marked as ultimately trusted
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg: aka "Mark Brown <broonie@debian.org>"
# gpg: aka "Mark Brown <broonie@kernel.org>"
# gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg: aka "Mark Brown <broonie@linaro.org>"
# gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
Diffstat (limited to 'sound/soc/codecs/rt5645.h')
| -rw-r--r-- | sound/soc/codecs/rt5645.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/sound/soc/codecs/rt5645.h b/sound/soc/codecs/rt5645.h index 8c964cfb120d..61bc8ab77646 100644 --- a/sound/soc/codecs/rt5645.h +++ b/sound/soc/codecs/rt5645.h @@ -779,8 +779,6 @@ #define RT5645_PWR_CLS_D_R_BIT 9 #define RT5645_PWR_CLS_D_L (0x1 << 8) #define RT5645_PWR_CLS_D_L_BIT 8 -#define RT5645_PWR_ADC_R (0x1 << 1) -#define RT5645_PWR_ADC_R_BIT 1 #define RT5645_PWR_DAC_L2 (0x1 << 7) #define RT5645_PWR_DAC_L2_BIT 7 #define RT5645_PWR_DAC_R2 (0x1 << 6) @@ -1628,6 +1626,10 @@ #define RT5645_OT_P_NOR (0x0 << 10) #define RT5645_OT_P_INV (0x1 << 10) #define RT5645_IRQ_JD_1_1_EN (0x1 << 9) +#define RT5645_JD_1_1_MASK (0x1 << 7) +#define RT5645_JD_1_1_SFT 7 +#define RT5645_JD_1_1_NOR (0x0 << 7) +#define RT5645_JD_1_1_INV (0x1 << 7) /* IRQ Control 2 (0xbe) */ #define RT5645_IRQ_MB1_OC_MASK (0x1 << 15) |