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| author | Mustapha Ghaddar <mghaddar@amd.com> | 2022-11-02 17:14:16 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-23 17:47:14 +0300 |
| commit | fe4e2662b2ddccd7fa8fc034ed71880626fab279 (patch) | |
| tree | e6937c5008d728687ba42d3f639f096e50a961c5 /scripts/generate_rust_analyzer.py | |
| parent | 7ce24a3606855f656f30c174e3078a1c642f1e41 (diff) | |
| download | linux-fe4e2662b2ddccd7fa8fc034ed71880626fab279.tar.xz | |
drm/amd/display: Phase 1 Add Bw Allocation source and header files
[WHY]
To implement BW Allocation as per USB4 spec chapter 10.7
[HOW]
Implement the DP-Tx portion of the logic to interact with DPIA
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions