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| author | Andy Tang <andy.tang@nxp.com> | 2022-12-02 10:59:05 +0300 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2022-12-07 15:29:14 +0300 |
| commit | c8d2d76d7646dc9b2d377699f68dce5403ad9b80 (patch) | |
| tree | 21e9ec0c5bc507bb543ba0a1f155df50f6946be8 /scripts/generate_rust_analyzer.py | |
| parent | 496182a389627a60d1b12be32d1640b14c678b8b (diff) | |
| download | linux-c8d2d76d7646dc9b2d377699f68dce5403ad9b80.tar.xz | |
mmc: sdhci-of-esdhc: limit the SDHC clock frequency
The highest clock frequency for eMMC HS200 mode on ls1043a
is 116.7Mhz according to its specification.
So add the limit to gate the frequency.
Signed-off-by: Andy Tang <andy.tang@nxp.com>
Link: https://lore.kernel.org/r/20221202075905.25363-1-andy.tang@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions