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author | Sean Christopherson <seanjc@google.com> | 2024-04-06 02:55:58 +0300 |
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committer | Sean Christopherson <seanjc@google.com> | 2024-06-11 00:29:38 +0300 |
commit | c092fc879f99cf536881892e2dbe2a70074e9915 (patch) | |
tree | 933ed7c8b50f9e381f287ada085b6e4c814508e4 /scripts/generate_rust_analyzer.py | |
parent | 6463e5e41842c58da06ce4a0ff1b5bb923f5f033 (diff) | |
download | linux-c092fc879f99cf536881892e2dbe2a70074e9915.tar.xz |
KVM: x86: Inhibit code #DBs in MOV-SS shadow for all Intel compat vCPUs
Treat code #DBs as inhibited in MOV/POP-SS shadows for vCPU models that
are Intel compatible, not just strictly vCPUs with vendor==Intel. The
behavior is explicitly called out in the SDM, and thus architectural, i.e.
applies to all CPUs that implement Intel's architecture, and isn't a quirk
that is unique to CPUs manufactured by Intel:
However, if an instruction breakpoint is placed on an instruction located
immediately after a POP SS/MOV SS instruction, the breakpoint will be
suppressed as if EFLAGS.RF were 1.
Applying the behavior strictly to Intel wasn't intentional, KVM simply
didn't have a concept of "Intel compatible" as of commit baf67ca8e545
("KVM: x86: Suppress code #DBs on Intel if MOV/POP SS blocking is active").
Link: https://lore.kernel.org/r/20240405235603.1173076-6-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions