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| author | Alvin Lee <Alvin.Lee2@amd.com> | 2022-11-08 01:07:32 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-23 17:47:13 +0300 |
| commit | ae7169a9a2edf915da436db57c71af7f3935feac (patch) | |
| tree | 0518255f7067b22055a9db69b03bb65a8aa43fd0 /scripts/generate_rust_analyzer.py | |
| parent | 2aae59444cca97b580143d77c0c4f60c559848db (diff) | |
| download | linux-ae7169a9a2edf915da436db57c71af7f3935feac.tar.xz | |
drm/amd/display: Add margin on DRR vblank start for subvp
[Description]
- Add margin for HUBP "jitter" for SubVp + DRR case
- Also do a min transition even if MPO is added on a
non SubVP pipe (i.e. added on DRR pipe for SubVP + DRR)
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions