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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2019-04-15 03:46:30 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-05-01 13:35:47 +0300 |
| commit | 37d5d32ae091c7acff23a080e3c179977fb943cd (patch) | |
| tree | 108da2f4cd8718a786f9305642a54740fb8cfcf7 /scripts/generate_rust_analyzer.py | |
| parent | c2c708bc1dbf9655211d3843e2f36c7951059cf0 (diff) | |
| download | linux-37d5d32ae091c7acff23a080e3c179977fb943cd.tar.xz | |
PCI: imx6: Restrict PHY register data to 16-bit
PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
masking if we restrict pcie_phy_read()/pcie_phy_write() to use 'u16'
instead of 'int'. No functional change intended.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions