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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-04-28 11:06:29 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-04-28 11:06:29 +0300 |
| commit | 07ba85678145d73362e87552245aff72a88975d7 (patch) | |
| tree | 5d1b2637771d162218ab1be70f65a5d36721d6d7 /scripts/gdb/linux/utils.py | |
| parent | 6424962816ded55a01299c1458a2d21fadc779cc (diff) | |
| parent | 41b2df22fafbca2c69dcce9f93c7042e6ccd69ef (diff) | |
| download | linux-07ba85678145d73362e87552245aff72a88975d7.tar.xz | |
Merge tag 'renesas-r8a7742-dt-binding-defs-tag' into clk-renesas-for-v5.8
Renesas RZ/G1H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G1H (R8A7742) SoC,
shared by driver and DT source files.
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions