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authorJacob Pan <jacob.jun.pan@linux.intel.com>2024-04-23 20:41:08 +0300
committerThomas Gleixner <tglx@linutronix.de>2024-04-30 01:54:42 +0300
commit43650dcf6d6322ec2d0938bb51f755810ffa783a (patch)
tree2cd02699df1c194b5e3a0749d6a89f3e4d7d2a87 /scripts/gdb/linux/proc.py
parentf5a3562ec9dd29e61735ccf098d8ba05cf6c7c72 (diff)
downloadlinux-43650dcf6d6322ec2d0938bb51f755810ffa783a.tar.xz
x86/irq: Set up per host CPU posted interrupt descriptors
To support posted MSIs, create a posted interrupt descriptor (PID) for each host CPU. Later on, when setting up interrupt affinity, the IOMMU's interrupt remapping table entry (IRTE) will point to the physical address of the matching CPU's PID. Each PID is initialized with the owner CPU's physical APICID as the destination. Originally-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-7-jacob.jun.pan@linux.intel.com
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