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authorLuo Jie <quic_luoj@quicinc.com>2025-01-03 10:31:38 +0300
committerBjorn Andersson <andersson@kernel.org>2025-01-07 02:44:06 +0300
commit050b312654523aac9495eae3cf7bfa868fd981ce (patch)
tree88d4eccee50db3c18effa177c9b3ea3bdcf78993 /scripts/gdb/linux/proc.py
parent758aa2d7e3c0acfe9c952a1cbe6416ec6130c2a1 (diff)
downloadlinux-050b312654523aac9495eae3cf7bfa868fd981ce.tar.xz
arm64: dts: qcom: ipq9574: Update xo_board_clk to use fixed factor clock
xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock 48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog block routing channel. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-5-c89fb4d4849d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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