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| author | Herve Codina <herve.codina@bootlin.com> | 2022-05-20 12:41:51 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-06-24 01:34:19 +0300 |
| commit | 2ed9ae81e8f4a5c96818403452a28f7947de3d34 (patch) | |
| tree | f2fcc4714f63f34d888a579326e4107bc88517d9 /scripts/gdb/linux/lists.py | |
| parent | 409ae431b9c23fc2752982a80c9b8b55ab5903c7 (diff) | |
| download | linux-2ed9ae81e8f4a5c96818403452a28f7947de3d34.tar.xz | |
dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for R9A06G032
Add internal PCI bridge support for the R9A06G032 SOC. The Renesas RZ/N1D
(R9A06G032) internal PCI bridge is compatible with the one present in the
R-Car Gen2 family, but compared to R-Car Gen2, it needs three clocks
instead of one.
The 'resets' property is not required for the RZ/N1 family.
Link: https://lore.kernel.org/r/20220520094155.313784-3-herve.codina@bootlin.com
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/lists.py')
0 files changed, 0 insertions, 0 deletions