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| author | Chen Wang <unicorn_wang@outlook.com> | 2023-11-24 09:02:43 +0300 |
|---|---|---|
| committer | Chen Wang <unicorn_wang@outlook.com> | 2024-06-14 09:49:40 +0300 |
| commit | 5911423798b2eba65d6ea0aff6505280b3eb55e6 (patch) | |
| tree | 45539a7a214f47f2fac2962f0f3da96d5ea07193 /scripts/gdb/linux/config.py | |
| parent | 5a7144d61d73d801540f8846d8e1b9fa52a5559c (diff) | |
| download | linux-5911423798b2eba65d6ea0aff6505280b3eb55e6.tar.xz | |
dt-bindings: clock: sophgo: add clkgen for SG2042
Add bindings for the clock generator of divider/mux and gates working
for other subsystem than RP subsystem for Sophgo SG2042.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/config.py')
0 files changed, 0 insertions, 0 deletions