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authorKevin Brodsky <kevin.brodsky@arm.com>2024-07-02 12:13:49 +0300
committerCatalin Marinas <catalin.marinas@arm.com>2024-07-04 17:10:31 +0300
commit5e30c16b58a486ff8700512e43eac9949c32621b (patch)
tree3be4547101fb7fedf1484b7495043299e5e3c19c /scripts/clang-tools/gen_compile_commands.py
parent83a7eefedc9b56fe7bfeff13b6c7356688ffa670 (diff)
downloadlinux-5e30c16b58a486ff8700512e43eac9949c32621b.tar.xz
Documentation: arm64: Update memory.rst for TBI
Most of memory.rst was written very early, at a time where TBI (Top Byte Ignore) was not enabled. Nowadays TBI0 is always enabled, and TBI1 may be enabled, depending on the kernel configuration. This means that VA bits 63:56 cannot generally be assumed to have any particular value. Regardless of TBI, TTBRx selection is done based on bit 55; update memory.rst accordingly. Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20240702091349.356008-1-kevin.brodsky@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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