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authorTakahiro Kuwano <Takahiro.Kuwano@infineon.com>2022-07-25 12:25:05 +0300
committerTudor Ambarus <tudor.ambarus@microchip.com>2022-07-28 05:19:27 +0300
commitb6b23833fc42a10ceed00006cb0a6184f9b9bbde (patch)
treea05a972518ab0b549c1bfd9a5bbdeb71ddaaec6c /net/x25
parenta6b50aa1279614df7033f8b57d6854fce0334e27 (diff)
downloadlinux-b6b23833fc42a10ceed00006cb0a6184f9b9bbde.tar.xz
mtd: spi-nor: spansion: Add s25hl-t/s25hs-t IDs and fixups
The S25HL-T/S25HS-T family is the Infineon SEMPER Flash with Quad SPI. These Infineon chips support volatile version of configuration registers and it is recommended to update volatile registers in the field application due to a risk of the non-volatile registers corruption by power interrupt. Add support for volatile QE bit. For the single-die package parts (512Mb and 1Gb), only bottom 4KB and uniform sector sizes are supported. This is due to missing or incorrect entries in SMPT. Fixup for other sector sizes configurations will be followed up as needed. Tested on Xilinx Zynq-7000 FPGA board. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220725092505.446315-8-tudor.ambarus@microchip.com
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